1. Field of the Invention
The present invention relates generally to the field of digital data processing circuits. Specifically, the present invention relates to a digital circuit which receives a serial data stream and then generates a clock signal which is synchronized to the serial data stream.
2. Description of the Prior Art
In missile telemetry systems there is a need to extract from an incoming Non-Return-To-Zero-Level (NRZ-L) serial data stream the frame sync words. The extraction of these frame sync words is performed by a decommutator located at a receiving station. The decommutator requires a co-incident clock signal to extract the frame sync words from the incoming Non-Return-To-Zero-Level serial data stream. Since there is only one channel available to transmit NRZ.sub.-- L data from the missile's telemetry system to the receiving station, the co-incident clock signal must be generated at the receiving station.
With this disadvantage known to the transmission of NRZ.sub.-- L data from a missile to a receiving station, the present invention was conceived and one of its objects is to provide a relatively simple and highly efficient digital circuit for generating a clock signal at a receiving station which is synchronized to an incoming NRZ.sub.-- L data stream.
Another object of the present invention is to provide a relatively simple yet highly reliable digital circuit which is adaptable to any communication systems which requires the synchronization of the clock signal to the data stream.
Various other advantages and objectives of the present invention will become more apparent to those skilled in the art as a more detailed description of the invention is set forth below.